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Remove hard coded clock speed from ADC example.

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This commit is contained in:
Jonathan Pallant (42 Technology) 2021-09-27 17:29:50 +01:00
parent b3b0c0c63a
commit 07c183a636
1 changed files with 7 additions and 10 deletions
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17
rp2040-hal/examples/adc.rs
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@ -20,18 +20,18 @@ use panic_halt as _;
// Alias for our HAL crate
use rp2040_hal as hal;
// An ADC trait we need
use embedded_hal::adc::OneShot;
// A debug/string formatting trait we need
// The traits we need
use core::fmt::Write;
use embedded_hal::adc::OneShot;
use embedded_time::fixed_point::FixedPoint;
use rp2040_hal::clocks::Clock;
// A shorter alias for the Peripheral Access Crate, which provides low-level
// register access
use hal::pac;
// The linker will place this boot block at the start of our program image. We
// need this to help the ROM bootloader get our code up and running.
/// The linker will place this boot block at the start of our program image. We
/// need this to help the ROM bootloader get our code up and running.
#[link_section = ".boot2"]
#[used]
pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER;
@ -40,9 +40,6 @@ pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER;
/// if your board has a different frequency
const XTAL_FREQ_HZ: u32 = 12_000_000u32;
/// Run RP2040 at 125 MHz
const SYS_FREQ_HZ: u32 = hal::pll::common_configs::PLL_SYS_125MHZ.vco_freq.0;
/// Entry point to our bare-metal application.
///
/// The `#[entry]` macro ensures the Cortex-M start-up code calls this function
@ -74,7 +71,7 @@ fn main() -> ! {
// The delay object lets us wait for specified amounts of time (in
// milliseconds)
let mut delay = cortex_m::delay::Delay::new(core.SYST, SYS_FREQ_HZ);
let mut delay = cortex_m::delay::Delay::new(core.SYST, clocks.system_clock.freq().integer());
// The single-cycle I/O block controls our GPIO pins
let sio = hal::sio::Sio::new(pac.SIO);