Merge pull request #36 from anall/feature/sio

add module to manage ownership of parts of SIO

rp2040-hal/examples/blinky.rs

@@ -17,7 +17,10 @@ pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER;
 fn main() -> ! {
     let mut pac = rp2040_pac::Peripherals::take().unwrap();
 
-    let pins = pac.IO_BANK0.split(pac.PADS_BANK0, pac.SIO, &mut pac.RESETS);
+    let sio = Sio::new(pac.SIO);
+    let pins = pac
+        .IO_BANK0
+        .split(pac.PADS_BANK0, sio.gpio_bank0, &mut pac.RESETS);
     let mut led_pin = pins.gpio25.into_output();
 
     loop {

rp2040-hal/examples/gpio_in_out.rs

@@ -19,7 +19,10 @@ pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER;
 fn main() -> ! {
     let mut pac = rp2040_pac::Peripherals::take().unwrap();
 
-    let pins = pac.IO_BANK0.split(pac.PADS_BANK0, pac.SIO, &mut pac.RESETS);
+    let sio = Sio::new(pac.SIO);
+    let pins = pac
+        .IO_BANK0
+        .split(pac.PADS_BANK0, sio.gpio_bank0, &mut pac.RESETS);
     let mut led_pin = pins.gpio25.into_output();
     let button_pin = pins.gpio15.into_input().pull_up();
 

rp2040-hal/src/gpio.rs

@@ -23,6 +23,7 @@
 //! Output pins support the following options:
 //! - Slew rate (fast or slow)
 //! - Drive strength (2, 4, 8 or 12 mA)
+use crate::sio;
 
 /// Mode marker for an input pin
 pub struct Input;
@@ -64,7 +65,7 @@ pub enum OutputSlewRate {
 }
 
 macro_rules! gpio {
-    ($GPIOX:ident, $gpiox:ident, $PADSX:ident, $padsx:ident, $gpioxs:expr, [
+    ($GPIOX:ident, $gpiox:ident, $siotoken : ident, $PADSX:ident, $padsx:ident, $gpioxs:expr, [
         $($PXi:ident: ($pxi:ident, $i:expr, $is:expr),)+
     ]) => {
         #[doc = "HAL objects for the "]
@@ -76,10 +77,10 @@ macro_rules! gpio {
             use embedded_hal::digital::v2::{InputPin, OutputPin, StatefulOutputPin};
             use super::*;
 
-            impl GpioExt<pac::$PADSX, pac::SIO> for pac::$GPIOX {
+            impl GpioExt<pac::$PADSX, sio::$siotoken> for pac::$GPIOX {
                 type Parts = Parts;
 
-                fn split(self, pads: pac::$PADSX, sio: pac::SIO, resets: &mut pac::RESETS) -> Parts {
+                fn split(self, pads: pac::$PADSX, sio: sio::$siotoken, resets: &mut pac::RESETS) -> Parts {
                     resets.reset.modify(|_, w| w.$gpiox().clear_bit().$padsx().clear_bit());
                     // TODO: Implement Resets in the HAL
                     while resets.reset_done.read().$gpiox().bit_is_clear() {
@@ -103,7 +104,7 @@ macro_rules! gpio {
             #[doc = " pins"]
             pub struct Parts {
                 _pads: pac::$PADSX,
-                _sio: pac::SIO,
+                _sio: sio::$siotoken,
                 $(
                     #[doc = "GPIO pin "]
                     #[doc = $is]
@@ -265,7 +266,7 @@ macro_rules! gpio {
 }
 
 gpio!(
-    IO_BANK0, io_bank0, PADS_BANK0, pads_bank0, "IO_BANK0", [
+    IO_BANK0, io_bank0, SioGpioBank0, PADS_BANK0, pads_bank0, "IO_BANK0", [
         Gpio0: (gpio0, 0, "0"),
         Gpio1: (gpio1, 1, "1"),
         Gpio2: (gpio2, 2, "2"),

rp2040-hal/src/lib.rs

@@ -21,6 +21,7 @@ pub mod prelude;
 pub mod pwm;
 pub mod rom_data;
 pub mod rtc;
+pub mod sio;
 pub mod spi;
 pub mod ssi;
 pub mod timer;

rp2040-hal/src/prelude.rs

@@ -1,2 +1,3 @@
 //! Prelude
 pub use crate::gpio::GpioExt;
+pub use crate::sio::Sio;

rp2040-hal/src/sio.rs

@@ -0,0 +1,45 @@
+//! Single Cycle Input and Output (SIO)
+//!
+//! To be able to partition parts of the SIO block to other modules:
+//!
+//! ```rust
+//! let sio = Sio::new(pac.SIO);
+//! ```
+//!
+//! And then for example
+//!
+//! ```rust
+//! let pins = pac.IO_BANK0.split(pac.PADS_BANK0, sio.gpio_bank0, &mut pac.RESETS);
+//! ```
+use super::*;
+use core::marker::PhantomData;
+
+/// Marker struct for ownership of SIO gpio bank0
+pub struct SioGpioBank0 {
+    _private: PhantomData<u32>,
+}
+
+/// Struct containing ownership markers for managing ownership of the SIO registers.
+pub struct Sio {
+    _sio: pac::SIO,
+
+    /// GPIO Bank 0 registers
+    pub gpio_bank0: SioGpioBank0,
+    // we can hand out other things here, for example:
+    // gpio_qspi
+    // divider
+    // interp0
+    // interp1
+}
+impl Sio {
+    /// Create `Sio` from the PAC.
+    pub fn new(sio: pac::SIO) -> Self {
+        Self {
+            _sio: sio,
+
+            gpio_bank0: SioGpioBank0 {
+                _private: PhantomData,
+            },
+        }
+    }
+}