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https://github.com/italicsjenga/rp-hal-boards.git
synced 2024-12-23 20:51:31 +11:00
Update embedded time
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512172179a
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bcfbd72ed1
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@ -13,7 +13,7 @@ license = "MIT OR Apache-2.0"
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cortex-m = "0.7.2"
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rp2040-hal = { path = "../../rp2040-hal", version = "0.1.0" }
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cortex-m-rt = { version = "0.6.14", optional = true }
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embedded-time = "0.10.1"
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embedded-time = "0.12.0"
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[dev-dependencies]
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panic-halt= "0.2.0"
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@ -40,7 +40,7 @@ fn main() -> ! {
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.ok()
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.unwrap();
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let mut delay = cortex_m::delay::Delay::new(core.SYST, *clocks.system_clock.freq().integer());
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let mut delay = cortex_m::delay::Delay::new(core.SYST, clocks.system_clock.freq().integer());
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let sio = Sio::new(pac.SIO);
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let pins = Pins::new(
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@ -44,7 +44,7 @@ fn main() -> ! {
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.ok()
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.unwrap();
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let mut delay = cortex_m::delay::Delay::new(core.SYST, *clocks.system_clock.freq().integer());
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let mut delay = cortex_m::delay::Delay::new(core.SYST, clocks.system_clock.freq().integer());
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let mut pwm_pin = Pwm4::new(25);
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@ -12,7 +12,7 @@ license = "MIT OR Apache-2.0"
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[dependencies]
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cortex-m = "0.7.2"
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embedded-hal = { version = "0.2.5", features=["unproven"] }
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embedded-time = "0.10"
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embedded-time = "0.12.0"
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nb = "1.0"
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rp2040-pac = { git = "https://github.com/rp-rs/rp2040-pac", branch="main" }
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paste = "1.0"
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@ -191,7 +191,7 @@ macro_rules! clock {
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let div = if freq.eq(&src_freq) {
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1 << 8
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} else {
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*(shifted_src_freq / *freq.integer() as u64).integer() as u32
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(shifted_src_freq / freq.integer() as u64).integer() as u32
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};
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// If increasing divisor, set divisor before source. Otherwise set source
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@ -348,7 +348,7 @@ macro_rules! stoppable_clock {
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let div = if freq.eq(&src_freq) {
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1 << 8
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} else {
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*(shifted_src_freq / *freq.integer() as u64).integer() as u32
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(shifted_src_freq / freq.integer() as u64).integer() as u32
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};
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// If increasing divisor, set divisor before source. Otherwise set source
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@ -370,7 +370,7 @@ macro_rules! stoppable_clock {
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// Note XOSC_COUNT is not helpful here because XOSC is not
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// necessarily running, nor is timer... so, 3 cycles per loop:
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let sys_freq = 125_000_000; // TODO get actual sys_clk frequency
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let delay_cyc = sys_freq / *self.frequency.integer() + 1u32;
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let delay_cyc = sys_freq / self.frequency.integer() + 1u32;
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cortex_m::asm::delay(delay_cyc);
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}
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@ -173,10 +173,10 @@ impl<D: PhaseLockedLoopDevice> PhaseLockedLoop<Disabled, D> {
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}
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let fbdiv = vco_freq
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.checked_div(ref_freq_hz.integer())
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.checked_div(&ref_freq_hz.integer())
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.ok_or(Error::BadArgument)?;
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let fbdiv: u16 = (*fbdiv.integer())
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let fbdiv: u16 = (fbdiv.integer())
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.try_into()
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.map_err(|_| Error::BadArgument)?;
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@ -85,8 +85,8 @@ impl<D: SpiDevice, const DS: u8> Spi<Disabled, D, DS> {
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peri_frequency: F,
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baudrate: B,
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) -> Hertz {
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let freq_in = *peri_frequency.into().integer();
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let baudrate = *baudrate.into().integer();
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let freq_in = peri_frequency.into().integer();
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let baudrate = baudrate.into().integer();
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let mut prescale: u8 = u8::MAX;
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let mut postdiv: u8 = 1;
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@ -371,7 +371,7 @@ fn calculate_baudrate_dividers(
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let baudrate_div = frequency
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.integer()
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.checked_mul(8)
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.and_then(|r| r.checked_div(*wanted_baudrate.integer()))
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.and_then(|r| r.checked_div(wanted_baudrate.integer()))
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.ok_or(Error::BadArgument)?;
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Ok(match (baudrate_div >> 7, ((baudrate_div & 0x7F) + 1) / 2) {
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@ -408,7 +408,7 @@ fn configure_baudrate(
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device.uartlcr_h.modify(|_, w| w);
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Ok(Baud(
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(4 * *frequency.integer()) / (64 * baud_div_int + baud_div_frac) as u32,
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(4 * frequency.integer()) / (64 * baud_div_int + baud_div_frac) as u32,
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))
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}
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@ -113,12 +113,12 @@ impl CrystalOscillator<Disabled> {
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//See Chapter 2, Section 16, §3)
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//We do the calculation first.
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let startup_delay = frequency
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.checked_div(delay_to_hz.integer())
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.checked_div(&delay_to_hz.integer())
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.and_then(|r| r.to_generic::<u32>(DIVIDER).ok())
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.ok_or(Error::BadArgument)?;
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//Then we check if it fits into an u16.
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let startup_delay: u16 = (*startup_delay.integer())
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let startup_delay: u16 = (startup_delay.integer())
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.try_into()
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.map_err(|_| Error::BadArgument)?;
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