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spi: support zero post-divide

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This allows you to use a 62.5 MHz SPI baud rate assuming the default 125
MHz peripheral clock. It would previously crash due to a division by
zero.
This commit is contained in:
Rich Lane 2021-10-11 18:55:46 -07:00 committed by 9names
parent dd4a9a8f22
commit c8bb2e43c7
1 changed files with 3 additions and 3 deletions
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6
rp2040-hal/src/spi.rs
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@ -86,7 +86,7 @@ impl<S: State, D: SpiDevice, const DS: u8> Spi<S, D, DS> {
let freq_in = peri_frequency.into().integer();
let baudrate = baudrate.into().integer();
let mut prescale: u8 = u8::MAX;
let mut postdiv: u8 = 1;
let mut postdiv: u8 = 0;
// Find smallest prescale value which puts output frequency in range of
// post-divide. Prescale is an even number from 2 to 254 inclusive.
@ -104,8 +104,8 @@ impl<S: State, D: SpiDevice, const DS: u8> Spi<S, D, DS> {
debug_assert_ne!(prescale, u8::MAX);
// Find largest post-divide which makes output <= baudrate. Post-divide is
// an integer in the range 1 to 256 inclusive.
for postdiv_option in (0..=255u8).rev() {
// an integer in the range 0 to 255 inclusive.
for postdiv_option in (1..=255u8).rev() {
if freq_in / (prescale as u32 * postdiv_option as u32) > baudrate {
postdiv = postdiv_option;
break;