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https://github.com/italicsjenga/rp-hal-boards.git
synced 2024-12-23 20:51:31 +11:00
Remove the alloc requirement for Core::spawn
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@ -52,7 +52,6 @@ rt = ["rp2040-pac/rt"]
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# This is commented out so that we can publish to crates.io
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#
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# embassy-traits = ["embassy_traits", "futures"]
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alloc = []
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rom-func-cache = []
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disable-intrinsics = []
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rom-v2-intrinsics = []
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@ -57,7 +57,7 @@ const CORE1_TASK_COMPLETE: u32 = 0xEE;
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/// the stack guard to take up the least amount of usable RAM.
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static mut CORE1_STACK: Stack<4096> = Stack::new();
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fn core1_task() -> ! {
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fn core1_task(sys_freq: u32) -> ! {
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let mut pac = unsafe { pac::Peripherals::steal() };
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let core = unsafe { pac::CorePeripherals::steal() };
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@ -70,10 +70,6 @@ fn core1_task() -> ! {
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);
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let mut led_pin = pins.gpio25.into_push_pull_output();
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// The first thing core0 sends us is the system bus frequency.
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// The systick is based on this frequency, so we need that to
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// be accurate when sleeping via cortex_m::delay::Delay
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let sys_freq = sio.fifo.read_blocking();
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let mut delay = cortex_m::delay::Delay::new(core.SYST, sys_freq);
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loop {
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let input = sio.fifo.read();
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@ -114,17 +110,16 @@ fn main() -> ! {
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.ok()
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.unwrap();
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let sys_freq = clocks.system_clock.freq().integer();
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// The single-cycle I/O block controls our GPIO pins
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let mut sio = hal::sio::Sio::new(pac.SIO);
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let mut mc = Multicore::new(&mut pac.PSM, &mut pac.PPB, &mut sio);
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let cores = mc.cores();
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let core1 = &mut cores[1];
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let _test = core1.spawn(core1_task, unsafe { &mut CORE1_STACK.mem });
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let _test = core1.spawn(move || core1_task(sys_freq), unsafe { &mut CORE1_STACK.mem });
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// Let core1 know how fast the system clock is running
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let sys_freq = clocks.system_clock.freq().integer();
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sio.fifo.write_blocking(sys_freq);
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/// How much we adjust the LED period every cycle
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const LED_PERIOD_INCREMENT: i32 = 2;
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@ -33,10 +33,13 @@
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//!
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//! For a detailed example, see [examples/multicore_fifo_blink.rs](https://github.com/rp-rs/rp-hal/tree/main/rp2040-hal/examples/multicore_fifo_blink.rs)
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use crate::pac;
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use core::mem;
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use core::mem::ManuallyDrop;
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#[cfg(feature = "alloc")]
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extern crate alloc;
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use pac::Peripherals;
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use crate::pac;
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use crate::Sio;
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/// Errors for multicore operations.
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#[derive(Debug)]
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@ -52,7 +55,7 @@ pub enum Error {
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// rust can read here. Ideally this would be a
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// #[naked] function but that is not stable yet.
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static MULTICORE_TRAMPOLINE: [u16; 2] = [
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0xbd03, // pop {r0, r1, pc} - call wrapper (pc) with r0 and r1
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0xbd07, // pop {r0, r1, r2, pc} - call wrapper (pc) with r0, r1 and r2
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0x46c0, // nop - pad this out to 32 bits long
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];
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@ -143,7 +146,7 @@ impl<'p> Core<'p> {
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fn inner_spawn(
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&mut self,
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wrapper: *mut (),
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entry: *mut (),
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entry: u64,
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stack: &'static mut [usize],
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) -> Result<(), Error> {
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if let Some((psm, ppb, sio)) = self.inner.as_mut() {
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@ -164,6 +167,7 @@ impl<'p> Core<'p> {
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push(wrapper as usize);
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push(stack.as_mut_ptr() as usize);
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push((entry >> 32) as usize);
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push(entry as usize);
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let vector_table = ppb.vtor.read().bits();
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@ -210,41 +214,59 @@ impl<'p> Core<'p> {
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}
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/// Spawn a function on this core.
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#[cfg(not(feature = "alloc"))]
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pub fn spawn(&mut self, entry: fn() -> !, stack: &'static mut [usize]) -> Result<(), Error> {
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#[allow(improper_ctypes_definitions)]
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extern "C" fn core1_no_alloc(entry: fn() -> !, stack_bottom: *mut usize) -> ! {
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core1_setup(stack_bottom);
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entry();
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}
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self.inner_spawn(core1_no_alloc as _, entry as _, stack)
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}
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/// Spawn a function on this core.
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#[cfg(feature = "alloc")]
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pub fn spawn<F>(&mut self, entry: F, stack: &'static mut [usize]) -> Result<(), Error>
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where
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F: FnOnce() -> bad::Never,
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F: Send + 'static,
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{
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use alloc::boxed::Box;
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let main: Box<dyn FnOnce() -> bad::Never> = Box::new(move || entry());
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let p = Box::into_raw(Box::new(main));
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extern "C" fn core1_alloc(entry: *mut (), stack_bottom: *mut usize) -> ! {
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core1_setup(stack_bottom);
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let main = unsafe { Box::from_raw(entry as *mut Box<dyn FnOnce() -> bad::Never>) };
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main();
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// idea stolen from https://users.rust-lang.org/t/invoke-mut-dyn-fnonce/59356/4
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trait Core1Main {
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/// # Safety
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///
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/// Must only be called once.
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unsafe fn run(&mut self) -> !;
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}
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self.inner_spawn(core1_alloc as _, p as _, stack)
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impl<T: FnOnce() -> bad::Never> Core1Main for T {
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unsafe fn run(&mut self) -> ! {
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let f = (self as *mut Self).read();
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// Signal that it's safe for the other core to get rid of the original value now
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let peripherals = Peripherals::steal();
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let sio = Sio::new(peripherals.SIO);
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let mut fifo = sio.fifo;
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fifo.write_blocking(1);
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f()
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}
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}
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extern "C" fn core1(entry: u64, stack_bottom: *mut usize) -> ! {
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core1_setup(stack_bottom);
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let main: *mut dyn Core1Main = unsafe { mem::transmute(entry) };
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unsafe { (*main).run() }
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}
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// We don't want to drop this, since it's getting moved to the other core.
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let mut entry = ManuallyDrop::new(entry);
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let ptr = &mut *entry as &mut dyn Core1Main;
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let ptr = unsafe { mem::transmute(ptr) };
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self.inner_spawn(core1 as _, ptr, stack)?;
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// If `inner_spawn` succeeded, this must not have been `None`,
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// so it's fine to unwrap it.
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let (_, _, sio) = self.inner.as_mut().unwrap();
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// Wait until the other core has copied `entry` before dropping it.
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sio.fifo.read_blocking();
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Ok(())
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}
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}
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// https://github.com/nvzqz/bad-rs/blob/master/src/never.rs
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#[cfg(feature = "alloc")]
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mod bad {
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pub(crate) type Never = <F as HasOutput>::Output;
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