alex/rp-hal-boards
1
0
Fork 0
mirror of https://github.com/italicsjenga/rp-hal-boards.git synced 2024-12-25 13:31:31 +11:00
Code Issues Packages Projects Releases Wiki Activity
107 commits 1 branch 0 tags 1.4 MiB
Commit graph

78 commits

Author SHA1 Message Date
Andrea Nall 2ef1343c05 add module to manage ownership of parts of SIO 2021-05-09 22:33:36 -05:00
9names 877c967466
Merge pull request #28 from Nic0w/uart 
Working implementation of an UART HAL.
 2021-05-09 18:07:05 +10:00
9names c5da7659c9
Merge pull request #27 from Nic0w/pll 
Working HAL for PLLs
 2021-05-09 17:59:27 +10:00
Nic0w 9b082b012d Clippy, second pass for errors in CI. 2021-05-09 09:53:22 +02:00
Nic0w a663b1f552 Clippy, second pass for errors in CI. 2021-05-09 09:42:31 +02:00
Nic0w e18111d564 Merge branch 'uart' of github.com:Nic0w/rp-hal into uart 2021-05-05 08:10:34 +02:00
Nic0w 020c9d9a3d cargo clippy & fmt 2021-05-05 08:06:47 +02:00
Nic0w c35358f475 Change comment on baudrate calculation 2021-05-05 08:02:53 +02:00
Nic0w 64dee52dd5 Satisfies clippy 2021-05-05 07:55:51 +02:00
9names 72127aa8e7
Remove duplicate entry in Cargo.toml 
Remove accidental duplication of embedded-time dependency introduced when performing merge-conflict resolution
 2021-05-05 12:48:40 +10:00
9names 31b0230da1
Merge branch 'main' into uart 2021-05-05 12:46:06 +10:00
9names d26e13c5ef
Merge branch 'main' into basic-gpio 2021-05-05 08:23:03 +10:00
Nic0w 8586f98c02 Better comments and renamed variable names for more clarity. 2021-05-04 22:16:04 +02:00
Nic0w be78a5c792 Consistency re. clear_bit/set_bit. 2021-05-04 19:56:36 +02:00
Nic0w ac2af7582e Pulling the integer out of the frequency first. 2021-05-04 19:54:15 +02:00
Nic0w d9b1b2b1ec Fix comments on {read,write}_raw() functions 2021-05-04 19:48:40 +02:00
9names 416baf6405 Add #Safety tag to unsafe rationale docstring 2021-05-04 18:08:06 +10:00
9names 7588f76844
Merge branch 'main' into basic-gpio 2021-05-04 16:35:46 +10:00
Nic0w 8d29464ee3 Propagate read errors. 2021-05-02 09:04:05 +02:00
Nic0w 992bcdf47b Cargo fmt 2021-05-02 08:42:51 +02:00
Nic0w abf91a3687 Move serial traits impl. back to uart.rs 2021-05-02 08:41:20 +02:00
Nic0w 835ad7a5c1 Read errors. 2021-05-02 08:27:29 +02:00
Nic0w 5620bdbd07 Move checks in new() so initialize() cannot fail. 2021-04-29 21:06:11 +02:00
Nic0w eb4ebc782a Cargo fmt pass. 2021-04-29 20:35:47 +02:00
Nic0w e91e124484 Merge branch 'pll' of github.com:Nic0w/rp-hal into pll 2021-04-29 20:21:02 +02:00
Nic0w eb376cf47b Using modify() to clear specific bits instead of a blanket 0 on all bits. 2021-04-29 20:16:52 +02:00
Nic0w 5726bef879 Fix typo on post_div check 
Co-authored-by: tdittr <tdittr@users.noreply.github.com>
 2021-04-29 20:16:52 +02:00
Nic0w 20c35d5e14 Fix type conversion issue 2021-04-29 20:16:52 +02:00
Nic0w 649998189f Move PLL parameters into a struct to help testability and reconfiguration of the PLL. 2021-04-29 20:16:52 +02:00
Nic0w 9be7c41400 Working implementation of a PLL HAL. 2021-04-29 20:16:52 +02:00
9names 010a5cabf3 Remove redundant field name 2021-04-29 11:19:47 +10:00
9names f21648de93 Autoformatted using cargo fmt 2021-04-29 11:15:41 +10:00
9names 1b42913077 Remove unneeded unsafe 2021-04-29 11:11:11 +10:00
9names 3bdc338a0d
Merge pull request #29 from tdittr/feature/doc-tests-in-ci 
Add `cargo test` to CI run and fix an error found by it
 2021-04-28 14:02:07 +10:00
9names f728de5efb
Merge pull request #25 from Nic0w/xosc 
Working HAL for the XOSC
 2021-04-28 14:01:10 +10:00
tdittr 39f02c4a44 Add cargo test to CI run and fix an error found by it 
Besides the normal usage of unit-tests this also ensures that
example in doc-comments do at least compile.
 2021-04-27 12:08:47 +02:00
Nic0w f3fba80a71 Implement embedded_hal::serial traits for the UART. 2021-04-26 22:05:37 +02:00
Nic0w 50a428e2ad Error needs to derive Debug if we want to unwrap. 2021-04-26 21:25:52 +02:00
Jennifer Wilcox 0ff51520f5 Merge branch 'main' of github.com:rp-rs/rp-hal into basic-gpio 2021-04-26 11:57:19 -05:00
Nic0w 920d0dc897 Merge branch 'uart' of github.com:Nic0w/rp-hal into uart 2021-04-26 09:20:22 +02:00
Nic0w 4d949f7310 Multiple changes addressing @tdittr 's comments. 2021-04-26 09:14:32 +02:00
Nic0w aa3fe8fd20 Disable the UART for real when disabling UART. 2021-04-25 20:25:29 +02:00
Nic0w c50a5b6001 Cosmetics. 2021-04-25 20:24:56 +02:00
Nic0w f9254fdffa
Increment byte_written after write has happened. 
Co-authored-by: tdittr <tdittr@users.noreply.github.com>
 2021-04-25 20:00:56 +02:00
Nic0w 2462c430b9
Fix typo on post_div check 
Co-authored-by: tdittr <tdittr@users.noreply.github.com>
 2021-04-25 19:48:09 +02:00
Nic0w c3bc1bbaf8 Fix type conversion issue 2021-04-25 19:45:45 +02:00
Jennifer Wilcox c4ae152fda
Update rp2040-hal/src/gpio.rs 
Co-authored-by: tdittr <tdittr@users.noreply.github.com>
 2021-04-25 12:17:05 -05:00
Jennifer Wilcox eaea9ae1ed Concentrate the unsafe register constructs 
This moves almost all of the unsafe stuff together. The last remaining bit is going to need a PAC fix.
 2021-04-25 12:13:44 -05:00
Jennifer Wilcox 8290368c10 Pull pads out of reset and wait 
We're technically supposed to wait for these resets to finish before poking at registers. This seems to fix the instability I was seeing on the input example especially (TBH I have no idea how it ever worked)
 2021-04-25 11:43:44 -05:00
Jennifer Wilcox 7e45c96a65 Do reset in a good way instead of a wacky way 2021-04-25 11:17:33 -05:00