Commit graph

14 commits

Author SHA1 Message Date
9names dc8ceffd09 Move uses of sio::Sio to Sio 2021-12-04 16:20:27 +11:00
Hmvp d3cb29b113
Fix doc examples and add checking (#76)
* Fix doc examples for peripheral drivers
* Add no_run to doc examples so they can be built by CI
* Enable building doc examples in CI check workflow
2021-08-11 10:53:42 +10:00
Derek Witt a03052355e
Correctly configure watchdog tick generation (#78)
Fix: The divider for watchdog tick generation is now being set to the
  source clock frequency in MHz, instead of the clock frequency in Hz.
  Watchdog ticks will now be generated at 1 microsecond intervals
  as intended.
2021-08-09 13:47:50 +10:00
Hmvp bcfbd72ed1 Update embedded time 2021-07-27 09:41:03 +10:00
9names 512172179a
Add unsafe blocks around write_with_zero calls (#68)
The newer version of svd2rust used in the PAC marks write_with_zero calls as unsafe, where the old one did not.
This PR wraps the only 2 calls instances of this in the HAL with unsafe blocks to fix the compile errors.
2021-07-27 09:31:19 +10:00
Hmvp ffa97842e2
Improve clock frequency stuff for uninitialized clocks and add some examples (#64)
* Improve clock frequency stuff for uninitialized clocks

- Made clocks singletons so the frequency handling actually works as expected
- Added initial frequencies
- Improved the docs
- Added a Clock trait

* Add pico examples.

These have the benefit of knowing which external crystal is attached.
Even though it always should be a 12 MHz crystal.
Thus we can setup the clocks properly

I also changed the rp2040 examples to work out of the box for pico boards since that will probably be used most of the time
2021-07-26 20:24:58 +10:00
Hmvp f310d92b64
Refactor clocks (#54)
* Remove unneeded lines

* Reduce macro boilerplate

* Refactor clocks
2021-07-08 20:58:48 +10:00
Hmvp 614180eda3
Clock init (#49)
Add preliminary clock init function
2021-07-07 01:30:44 +10:00
Andrea Nall e3be4f8025 Massive GPIO refactor
Bring in line with atsamd-hal GPIO v2

Copied as much as possible. Docs lifted mostly as-is.

Also add sample BSP for the Feather RP2040 in boards/feather_rp2040

May include a few random fixes from currently futile attempt to get doctests working.
2021-07-03 10:32:43 +10:00
Hmvp e7c2ef39c4 Add missing clocks
Also reorderd the macro invocations to match the datasheet
2021-06-29 19:35:08 +10:00
Andrea Nall 90a6f8414d fix clippy, run fmt 2021-06-27 14:50:06 +10:00
Nic0w 0d19834b2e Change all write to modify 2021-06-27 14:50:06 +10:00
Nic0w 4220b45c24 Cargo fmt 2021-06-27 14:50:06 +10:00
Nic0w ef7f8fe9b7 Initial commit on clocks 2021-06-27 14:50:06 +10:00