gb-emu/src/main.rs

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Rust
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#![feature(exclusive_range_pattern)]
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mod processor;
use clap::Parser;
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use processor::CPU;
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use std::{fs, io};
/// Simple program to greet a person
#[derive(Parser, Debug)]
#[command(author, version, about, long_about = None)]
struct Args {
/// ROM path
#[arg(short, long)]
rom: String,
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/// BootROM path
#[arg(short, long)]
bootrom: String,
}
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type Address = u16;
type ROM = Vec<u8>;
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#[derive(Clone, Copy)]
struct Inner {
right: u8,
left: u8,
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}
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#[derive(Clone, Copy)]
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union Register {
as_u8s: Inner,
as_u16: u16,
}
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pub struct Memory {
rom: ROM,
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vram: [u8; 8192],
ram: [u8; 8192],
}
impl Memory {
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fn init(rom: ROM) -> Self {
Self {
rom,
vram: [0x0; 8192],
ram: [0x0; 8192],
}
}
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fn get(&self, address: Address) -> u8 {
match address {
0x0..0x8000 => {
// rom access
// todo - switchable rom banks
return self.rom[address as usize];
}
0x8000..0xA000 => {
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return self.vram[(address - 0x8000) as usize];
}
0xA000..0xC000 => {
panic!("switchable ram bank");
}
0xC000..0xE000 => {
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return self.ram[(address - 0xC000) as usize];
}
0xE000..0xFE00 => {
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return self.ram[(address - 0xE000) as usize];
}
0xFE00..0xFEA0 => {
panic!("sprite attrib memory");
}
0xFEA0..0xFF00 => {
panic!("empty")
}
0xFF00..0xFF4C => {
panic!("I/O");
}
0xFF4C..0xFF80 => {
panic!("empty");
}
0xFF80..0xFFFF => {
panic!("internal ram");
}
0xFFFF => {
panic!("interrupt enable register");
}
}
}
fn set(&mut self, address: Address, data: u8) {
match address {
0x0..0x8000 => {
panic!("tried to write to rom?");
// self.rom[address as usize] = data;
}
0x8000..0xA000 => {
self.vram[(address - 0x8000) as usize] = data;
}
0xA000..0xC000 => {
panic!("switchable ram bank");
}
0xC000..0xE000 => {
self.ram[(address - 0xC000) as usize] = data;
}
0xE000..0xFE00 => {
self.ram[(address - 0xE000) as usize] = data;
}
0xFE00..0xFEA0 => {
panic!("sprite attrib memory");
}
0xFEA0..0xFF00 => {
panic!("empty")
}
0xFF00..0xFF4C => {
panic!("I/O");
}
0xFF4C..0xFF80 => {
panic!("empty");
}
0xFF80..0xFFFF => {
panic!("internal ram");
}
0xFFFF => {
panic!("interrupt enable register");
}
}
}
}
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pub struct State {
af: Register,
bc: Register,
de: Register,
hl: Register,
sp: Register,
pc: Register,
}
impl Default for State {
fn default() -> Self {
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// default post-bootrom values
Self {
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af: Register { as_u16: 0x01B0 },
bc: Register { as_u16: 0x0013 },
de: Register { as_u16: 0x00D8 },
hl: Register { as_u16: 0x014D },
sp: Register { as_u16: 0xFFFE },
pc: Register { as_u16: 0x0100 },
}
}
}
fn main() {
let args = Args::parse();
let rom: ROM = fs::read(args.rom).expect("Could not load ROM");
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let _bootrom: ROM = fs::read(args.bootrom).expect("Could not load BootROM");
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let mut cpu = CPU {
memory: Memory::init(rom),
state: State::default(),
};
loop {
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cpu.exec_next();
}
}
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#[allow(dead_code)]
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fn pause() {
io::stdin().read_line(&mut String::new()).unwrap();
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}