gb-emu/src/processor/memory.rs

222 lines
6.9 KiB
Rust
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use self::mmio::{Apu, Joypad};
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pub use self::rom::Rom;
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use crate::{processor::SplitRegister, verbose_println};
use gilrs::ConnectedGamepadsIterator;
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use minifb::Key;
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use std::io::{stdout, Write};
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mod mmio;
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pub(crate) mod rom;
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pub(crate) type Address = u16;
#[allow(dead_code)]
pub struct Memory {
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bootrom: Vec<u8>,
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bootrom_enabled: bool,
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rom: Rom,
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vram: [u8; 8192],
ram: [u8; 8192],
switchable_ram: [u8; 8192],
cpu_ram: [u8; 128],
oam: [u8; 160],
interrupts: u8,
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pub(super) ime: bool,
pub(super) ime_scheduled: u8,
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io: [u8; 76],
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pub(super) user_mode: bool,
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joypad: Joypad,
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apu: Apu,
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}
impl Memory {
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pub fn init(bootrom: Vec<u8>, bootrom_enabled: bool, rom: Rom) -> Self {
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Self {
bootrom,
bootrom_enabled,
rom,
vram: [0x0; 8192],
ram: [0x0; 8192],
switchable_ram: [0x0; 8192],
cpu_ram: [0x0; 128],
oam: [0x0; 160],
interrupts: 0x0,
ime: false,
ime_scheduled: 0x0,
io: [0xFF; 76],
user_mode: false,
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joypad: Joypad::default(),
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apu: Apu::default(),
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}
}
pub fn get(&self, address: Address) -> u8 {
match address {
0x0..0x8000 => {
// rom access
// todo - switchable rom banks
if self.bootrom_enabled && ((address as usize) < self.bootrom.len()) {
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self.bootrom[address as usize]
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} else {
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self.rom.get(address)
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}
}
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0x8000..0xA000 => self.vram[(address - 0x8000) as usize],
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0xA000..0xC000 => {
// cart ram
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self.rom.get_ram(address)
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}
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0xC000..0xE000 => self.ram[(address - 0xC000) as usize],
0xE000..0xFE00 => self.ram[(address - 0xE000) as usize],
0xFE00..0xFEA0 => self.oam[(address - 0xFE00) as usize],
0xFEA0..0xFF00 => 0xFF,
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0xFF00..0xFF4C => self.get_io(address),
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0xFF4C..0xFF80 => 0xFF,
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0xFF80..0xFFFF => self.cpu_ram[(address - 0xFF80) as usize],
0xFFFF => self.interrupts,
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}
}
pub fn set(&mut self, address: Address, data: u8) {
match address {
0x0..0x8000 => {
// change this with MBC code...
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self.rom.set(address, data);
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}
0x8000..0xA000 => {
self.vram[(address - 0x8000) as usize] = data;
}
0xA000..0xC000 => {
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self.rom.set_ram(address, data);
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}
0xC000..0xE000 => {
self.ram[(address - 0xC000) as usize] = data;
}
0xE000..0xFE00 => {
self.ram[(address - 0xE000) as usize] = data;
}
0xFE00..0xFEA0 => {
self.oam[(address - 0xFE00) as usize] = data;
}
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0xFEA0..0xFF00 => {}
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0xFF00..0xFF4C => {
self.set_io(address, data);
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stdout().flush().unwrap();
}
0xFF50 => {
self.bootrom_enabled = false;
}
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0xFF4C..0xFF50 | 0xFF51..0xFF80 => {}
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0xFF80..0xFFFF => {
self.cpu_ram[(address - 0xFF80) as usize] = data;
}
0xFFFF => {
verbose_println!("interrupts set to {:#b}", data);
verbose_println!(" / {:#X}", data);
self.interrupts = data;
}
}
}
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fn get_io(&self, address: Address) -> u8 {
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match address {
0xFF00 => self.joypad.as_register(),
0xFF10..0xFF40 => self.apu.get_register(address),
_ => self.io[(address - 0xFF00) as usize],
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}
}
fn set_io(&mut self, address: Address, data: u8) {
let addr_l = (address - 0xFF00) as usize;
if !self.user_mode {
self.io[addr_l] = data;
} else {
match address {
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0xFF00 => {
// joypad
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self.joypad.mmio_write(data);
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}
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0xFF02 => {
if data == 0x81 {
print!("{}", self.get(0xFF01) as char);
stdout().flush().unwrap();
}
}
0xFF04 => self.io[addr_l] = 0,
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0xFF07 => self.masked_io(addr_l, data, 0b111),
0xFF0F => self.masked_io(addr_l, data, 0b11111),
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0xFF10..0xFF40 => self.apu.mmio_write(address, data),
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0xFF41 => {
// mixed read/write
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self.masked_io(addr_l, data, 0b01111000);
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}
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0xFF4D | 0xFF56 => {
// cgb only
self.io[addr_l] = data;
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}
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0xFF03 | 0xFF08..0xFF0F | 0xFF44 | 0xFF76 | 0xFF77 => {
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// read-only addresses
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println!("BANNED write: {data:#X} to {address:#X}");
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}
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0xFF46 => {
if data > 0xDF {
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panic!("dma transfer out of bounds: {data:#X}");
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}
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self.io[addr_l] = data;
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let mut addr: u16 = 0x0;
addr.set_high(data);
for l in 0x0..0xA0 {
addr.set_low(l);
self.oam[l as usize] = self.get(addr);
}
}
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_ => {
self.io[addr_l] = data;
}
}
}
}
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fn masked_io(&mut self, addr_l: usize, data: u8, mask: u8) {
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self.io[addr_l] = masked_update(self.io[addr_l], data, mask);
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}
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pub fn update_pressed_keys(
&mut self,
keys: Vec<Key>,
gamepads: ConnectedGamepadsIterator,
) -> bool {
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self.joypad.update_pressed_keys(keys, gamepads)
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}
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pub(super) fn cpu_ram_init(&mut self) {
self.set(0xFF04, 0xAD);
self.set(0xFF10, 0x80);
self.set(0xFF11, 0xBF);
self.set(0xFF12, 0xF3);
self.set(0xFF14, 0xBF);
self.set(0xFF16, 0x3F);
self.set(0xFF19, 0xBF);
self.set(0xFF1A, 0x7F);
self.set(0xFF1B, 0xFF);
self.set(0xFF1C, 0x9F);
self.set(0xFF1E, 0xBF);
self.set(0xFF20, 0xFF);
self.set(0xFF23, 0xBF);
self.set(0xFF24, 0x77);
self.set(0xFF25, 0xF3);
self.set(0xFF26, 0xF1);
self.set(0xFF40, 0x91);
self.set(0xFF47, 0xFC);
self.set(0xFF48, 0xFF);
self.set(0xFF49, 0xFF);
for i in 0xC000..0xE000 {
self.set(i, if rand::random() { 0xFF } else { 0x00 });
}
}
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}
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pub fn masked_update(current: u8, data: u8, mask: u8) -> u8 {
(current & (!mask)) | (data & mask)
}