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Author SHA1 Message Date
Derek Witt a03052355e
Correctly configure watchdog tick generation (#78) 
Fix: The divider for watchdog tick generation is now being set to the
  source clock frequency in MHz, instead of the clock frequency in Hz.
  Watchdog ticks will now be generated at 1 microsecond intervals
  as intended.
 2021-08-09 13:47:50 +10:00
9names 369ac5a23f
Add UART example + core::fmt support to UART (#73) 
* Add standalone UART example
* Add UART example to docs in UART module
* Add core::fmt::write_str to UART module to allow easy use of format! macro in user code
 2021-08-08 15:36:56 +10:00
RICHΛRD ΛNΛYΛ 553263a5ff
Update README.md (#71) 
Add note about putting Pico in bootloader mode when using cargo run
 2021-08-03 14:11:05 +10:00
Hmvp 9d539b0e7d Simplify uf2 flashing 2021-07-31 18:52:50 +10:00
Rudo2204 2d1086915c Fix unsigned hardware divide/modulo 2021-07-30 10:50:58 +10:00
Hmvp ae8fe512bd Pico explorer board support 2021-07-27 19:37:29 +10:00
Hmvp bcfbd72ed1 Update embedded time 2021-07-27 09:41:03 +10:00
9names 512172179a
Add unsafe blocks around write_with_zero calls (#68) 
The newer version of svd2rust used in the PAC marks write_with_zero calls as unsafe, where the old one did not.
This PR wraps the only 2 calls instances of this in the HAL with unsafe blocks to fix the compile errors.
 2021-07-27 09:31:19 +10:00
Hmvp 4970075974 Also clippy check examples 2021-07-26 20:37:08 +10:00
Hmvp ffa97842e2
Improve clock frequency stuff for uninitialized clocks and add some examples (#64) 
* Improve clock frequency stuff for uninitialized clocks

- Made clocks singletons so the frequency handling actually works as expected
- Added initial frequencies
- Improved the docs
- Added a Clock trait

* Add pico examples.

These have the benefit of knowing which external crystal is attached.
Even though it always should be a 12 MHz crystal.
Thus we can setup the clocks properly

I also changed the rp2040 examples to work out of the box for pico boards since that will probably be used most of the time
 2021-07-26 20:24:58 +10:00
Andrea Nall 25cf81fdfe Add Adafruit Macropad BSP 2021-07-26 10:04:36 +10:00
Jonathan Nilsson 148cc2b8ea Warn missing docs, deny in ci 2021-07-25 02:17:43 +10:00
Jonathan Nilsson 1bf47df553 Deny warnings in ci 2021-07-25 02:17:43 +10:00
Jonathan Nilsson 077cba68f5
I2C (#56) 
* I2C implementation based on C SDK

* Basic I2C Example
 2021-07-25 02:16:07 +10:00
Marcuss2 a02c8131ff
Add HD44780 example (#60) 
* Added HD44780 lcd example

* Formatting lcd_display.rs

* Formatting Cargo.toml

* Fixed import formatting issue

* Fixed line with spaces
 2021-07-23 18:37:36 +10:00
Hmvp f310d92b64
Refactor clocks (#54) 
* Remove unneeded lines

* Reduce macro boilerplate

* Refactor clocks
 2021-07-08 20:58:48 +10:00
9names d2aa2b238d Run pwm.rs and pwm_blink.rs through cargo-fmt 2021-07-07 23:55:45 +10:00
Tyler Stowell f87d7ba768
PWM implementation (#44) 
* PWM functionality

* Updated prelude.rs

* Added example, cleaned up the PWM HAL.

* Renamed a file for clarity

* Changes to address C-CTOR recommendations, only 8 PWM channels, restructuring

* Forgot to remove a test function, and added a quick comment.

* Cleaned up code now that PWM channels are clustered in the PAC.
 2021-07-07 23:44:57 +10:00
Hmvp 17e65c4fd5
Initial ADC impl (#52) 
* Initial ADC + temp sensor support
 2021-07-07 23:38:25 +10:00
Andrea Nall 17f8a5ab99
Add 'rt' feature (#53) 
For the HAL, currently just passes the feature to the PAC.

Also pass the 'rt' feature through to the HAL for all the BSP crates.
 2021-07-07 19:33:36 +10:00
Hmvp 614180eda3
Clock init (#49) 
Add preliminary clock init function
 2021-07-07 01:30:44 +10:00
Hmvp c4f30a8ba6 Add bsp for Pico and Pimoroni Pico LiPo 2021-07-07 00:17:57 +10:00
Hmvp 0d4b0e5645 Add Pico Explorer board support 2021-07-07 00:17:57 +10:00
Hmvp 1c6a336104
Spi (#50) 
Add SPI support to the HAL
 2021-07-06 09:42:05 +10:00
Andrea Nall 711c0230b1 fix minor issues 2021-07-03 10:32:43 +10:00
Andrea Nall e3be4f8025 Massive GPIO refactor 
Bring in line with atsamd-hal GPIO v2

Copied as much as possible. Docs lifted mostly as-is.

Also add sample BSP for the Feather RP2040 in boards/feather_rp2040

May include a few random fixes from currently futile attempt to get doctests working.
 2021-07-03 10:32:43 +10:00
Andrea Nall 71a7057b76 split rom_data into safe and unsafe functions 2021-06-29 19:36:19 +10:00
Hmvp e7c2ef39c4 Add missing clocks 
Also reorderd the macro invocations to match the datasheet
 2021-06-29 19:35:08 +10:00
Hmvp 6edfc60960 Fix gpio docs 
The sio argument does not work with a bare pac SIO struct
 2021-06-28 23:18:22 +10:00
Andrea Nall 90a6f8414d fix clippy, run fmt 2021-06-27 14:50:06 +10:00
Nic0w 0d19834b2e Change all write to modify 2021-06-27 14:50:06 +10:00
Nic0w 4220b45c24 Cargo fmt 2021-06-27 14:50:06 +10:00
Nic0w ef7f8fe9b7 Initial commit on clocks 2021-06-27 14:50:06 +10:00
jspaulsen c4cd2ffe52 Add documentation to public functions and struct, fix logic issue with max period 2021-06-25 18:18:07 +10:00
jspaulsen c568f0d3df Panic if period exceeds maximum value, fmt 2021-06-25 18:18:07 +10:00
jspaulsen cdd9a553ad Add pause_on_debug, disable watchdog prior to enabling 2021-06-25 18:18:07 +10:00
jspaulsen fe72637972 Fix logic issue with delay_ms 2021-06-25 18:18:07 +10:00
jspaulsen 596bea309b Initial watchdog implementation 2021-06-25 18:18:07 +10:00
Rudo a14cbb5819
Hardware divide/modulo support (#40) 
* Initial SIO div/mod implementation
* Implement signed/unsigned methods for HwDivider
 2021-05-29 22:26:49 +10:00
9names 9bef0821d9
Merge pull request #38 from anall/bugfix/pll-uart-reset 
Have the `pll` and `uart` HAL modules bring the hardware out of reset
 2021-05-29 20:36:17 +10:00
Andrea Nall 8d0fde20c6 Add SubsystemReset trait to handle subsystem resets 
dd a `SubsystemReset` trait which adds a `reset_bring_up` function to the
relevant PAC types to handle bringing subsystems out of reset.

Also, correct that the PLL and UART modules did not bring the relevant
subsystems out of reset and refactor the GPIO module to use the
SubsystemReset trait.
 2021-05-16 13:12:26 -05:00
9names 9e7e785e22
Merge pull request #36 from anall/feature/sio 
add module to manage ownership of parts of SIO
 2021-05-12 00:12:45 +10:00
Andrea Nall 35464a1c4b typo fix, rustfmt 2021-05-10 08:29:59 -05:00
Andrea Nall 2ef1343c05 add module to manage ownership of parts of SIO 2021-05-09 22:33:36 -05:00
9names 877c967466
Merge pull request #28 from Nic0w/uart 
Working implementation of an UART HAL.
 2021-05-09 18:07:05 +10:00
9names c5da7659c9
Merge pull request #27 from Nic0w/pll 
Working HAL for PLLs
 2021-05-09 17:59:27 +10:00
Nic0w 9b082b012d Clippy, second pass for errors in CI. 2021-05-09 09:53:22 +02:00
Nic0w a663b1f552 Clippy, second pass for errors in CI. 2021-05-09 09:42:31 +02:00
Nic0w e18111d564 Merge branch 'uart' of github.com:Nic0w/rp-hal into uart 2021-05-05 08:10:34 +02:00
Nic0w 020c9d9a3d cargo clippy & fmt 2021-05-05 08:06:47 +02:00