* Implements methods to allow presetting the pin state & direction
Enabling those methods allows to save a few valuable instructions
in the PIO's memory.
* Update pio_proc_blink with new set_pindirs
Eventually, the read and write FIFOs need to be split into separate
objects for DMA. To be able to safely rejoin them only when they belong to
the same state machine, the state machine index needs to be encoded into
the type.
Some operations must only be performed in a specific state. For example,
pin directions must not be changed while the state machine is running, as
the operation modifies PINCTRL. The new API makes wrong usage a lot harder.
Also, the code now supports uninitializing state machines to free
instruction space or to select a different function.
Multiple state machines may want to execute the same program (e.g., two
state machines are used to implement two I2C buses), in which code sharing
saves space.
One PIO block often implements multiple functions that are used in
different parts of the codebase. Previously, that would be impossible, as
PIO contained all StateMachine instances.
Now, StateMachine instances use atomic operations whenever accessing shared
registers, so they can be used concurrently.
Implement rand_core::RngCore for RingOscillator from the get_random_bit
function. This is not suitable for security purposes so
rand_core::CryptoRng has not been implemented.
* Implement GPIO override
Interrupt status, input, output enable and output can be overridden.
See documentation for GPIO0_CTRL.
* Fix override enum names
* Use override_value instead of raw identifier
Set interrupt enable flags in USB driver. The flags were already being cleared in the USB driver.
Update USB examples to remove interrupt flag set/check as it is no longer necessary.
Initial implementation of PIO
Add all of the infrastructure required to include PIO programs and interact with PIO peripheral registers.
This was a massive effort between @devsnek and @henkkuli. It's great that it's now ready to go.
Co-authored-by: Gus Caplan <me@gus.host>
Implement usb_device for rp2040
Limitations
- RP2040-E5 (Device enumeration workaround) is not implemented
- Suspend/resume is not implemented
- VBus detection is not tested and may not be fully implemented
Fix: The divider for watchdog tick generation is now being set to the
source clock frequency in MHz, instead of the clock frequency in Hz.
Watchdog ticks will now be generated at 1 microsecond intervals
as intended.
* Add standalone UART example
* Add UART example to docs in UART module
* Add core::fmt::write_str to UART module to allow easy use of format! macro in user code
The newer version of svd2rust used in the PAC marks write_with_zero calls as unsafe, where the old one did not.
This PR wraps the only 2 calls instances of this in the HAL with unsafe blocks to fix the compile errors.
* Improve clock frequency stuff for uninitialized clocks
- Made clocks singletons so the frequency handling actually works as expected
- Added initial frequencies
- Improved the docs
- Added a Clock trait
* Add pico examples.
These have the benefit of knowing which external crystal is attached.
Even though it always should be a 12 MHz crystal.
Thus we can setup the clocks properly
I also changed the rp2040 examples to work out of the box for pico boards since that will probably be used most of the time
* PWM functionality
* Updated prelude.rs
* Added example, cleaned up the PWM HAL.
* Renamed a file for clarity
* Changes to address C-CTOR recommendations, only 8 PWM channels, restructuring
* Forgot to remove a test function, and added a quick comment.
* Cleaned up code now that PWM channels are clustered in the PAC.
Bring in line with atsamd-hal GPIO v2
Copied as much as possible. Docs lifted mostly as-is.
Also add sample BSP for the Feather RP2040 in boards/feather_rp2040
May include a few random fixes from currently futile attempt to get doctests working.
dd a `SubsystemReset` trait which adds a `reset_bring_up` function to the
relevant PAC types to handle bringing subsystems out of reset.
Also, correct that the PLL and UART modules did not bring the relevant
subsystems out of reset and refactor the GPIO module to use the
SubsystemReset trait.
